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NXP Semiconductors
PCA9533
4-bit I 2 C-bus LED dimmer
7.4 Bus transactions
SCL
1
2
3
4
5
6
7
8
9
slave address (PCA9533/01)
command byte
data to register
SDA S
1
1
0
0
0
1
0
0
A
0
0
0
AI
0 B2 B1 B0 A
DATA 1
A
START condition
R/W
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
write to register
t v(Q)
data out from port
DATA 1 VALID
002aae629
Fig 11. Write to register
slave address (PCA9533/01)
command byte
SDA S
1
1
0
0
0
1
0
0
A
0
0
0
AI
0 B2 B1 B0 A
(cont.)
START condition
R/W
acknowledge
from slave
acknowledge
from slave
slave address (PCA9533/01)
data from register
data from register
(cont.) S
1
1
0
0
0
1
0
1
A
DATA (first byte)
A
DATA (last byte)
NA P
Auto-Increment
(repeated)
START condition
R/W
acknowledge
register address
if AI = 1
acknowledge
from master
no acknowledge
from master
STOP
condition
from slave
at this moment master-transmitter becomes master-receiver
and slave-receiver becomes slave-transmitter
002aae630
Fig 12. Read from register
no acknowledge
from master
slave address (PCA9533/01)
data from port
data from port
SDA S
1
1
0
0
0
1
0
1
A
DATA 1
A
DATA 4
NA P
START condition
R/W
acknowledge
from slave
acknowledge
from master
STOP
condition
read from
port
t h(D)
t su(D)
data into
port
DATA 1
DATA 2
DATA 3
DATA 4
002aae631
Remark: This ?gure assumes the command byte has previously been programmed with 00h.
Fig 13. Read input port register
PCA9533_3
? NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 27 April 2009
10 of 24
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